Device Preparation for Single Event Effects Testing
Preparation for Single Event Effects (SEE) Testing can be quite demanding. Cobham RAD can significantly lessen these demands by using Cobham RAD proprietary processes and techniques that simplify this task.
Backside thinning to 35um allows for SEE testing at TAMU or Berkeley without repackaging of ICs.
Cobham RAD offers Quick-Turn Prototype IC Assembly, Chip Removal and Re-assembly for Radiation Testing, Backside Chip Thinning for Heavy Ion Radiation testing, PC Board Design, and Laser Marking.
Finished Package Backside Thinning
- Package backside thinning to 35µm ±5um
- Custom PC board design in preparation for SEE Testing
- Custom DUT Socket Solutions for SEE Testing of multiple interchangeable ICs for at-speed testing on a test board
- Die thinning is available as required to any thickness (±5um)
Die Extraction / Repackaging
- When package backside thinning is not a solution, we routinely perform die extraction and repackaging in preparation for SEE Testing
- Custom PC board design for SEE Testing is available
- DSCC MIL-STD-883 and MIL-STD-750 Laboratory Suitability
- ISO 9001:2008 Certification
- Package backside thinning to 25um thickness